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J Raymond
10-31-2002, 08:26 AM
Hi Tom,
I thought that 2D lines carried similar properties to TEXT when placed in a split-mixed plane. Where as when poured a clearance will be placed around the 2D line like it does with text.
Not so with a recent inherited design. The 2D line created copper and shorted 2 via's.
Is there any DRC setting that will flag this in the future? I got 0 errors when I did clearance and connectivity.
Thanks
Joyce

Tom
10-31-2002, 08:34 AM
Joyce,

2D-Lines do not have any electrical characteristics. They are used for documentation purposes only. Here at Wind River, it is against our rules to ever place a 2D-Line on any electrical layer. There is only one exception to this rule and that is where we use 2D-Lines to act as Closed Jumpers between 2 pins (so we do not get any DRC violations), but we always add a Copper Path under the 2D-Line that does not touch the pins, but will not allow any other traces through the opening.

The PowerPCB DRC checker ignores 2D-Lines. It always has and it always will. Copper Paths is the way to go to accomplish your goal, not 2D-Lines.