Wish list for PowerPCB Ver 4 [Archive]

Tom

11-05-2001, 04:45 PM

I wish that in the Setup/Preferences/Grids there were options to set the Text Grid, Placement Grid, Routing Grid and Ref Des Grid and that these settings were directly linked to the "Design Tool Box" so that when I selected the "Place Components" ICON the Grid would automatically change to whatever my default was. Then when I select the "Route Trace" ICON, the grid would automatically switch to the default routing grid. Then when I selected the "Move Ref Des" ICON the grid would automatically switch to the Ref Des grid.

This would be a big time saver and minimize the time spent changing grids.

This would also be a problem solver because once in a while you forget to change the grid for part placement and start placing parts on a routing grid.

jmatt

11-06-2001, 02:17 PM

Tom,

How about a "Global Grid" (GG?) setting that would sync ALL grids to whatever you set?

i.e. In a metric environment, "GG .1" -RTN- would set the visible, snap, design, etc grid to .1mm.

I would like that (I often want my visible and snap grid to be the same) and it would accomplish what you asked for. Or even a combination of your idea and mine....

JM

Tom Frayda

11-08-2001, 09:45 AM

I wish that there was a way to scroll through the initial list of clearance errors found by Verify Design/Clearance and be able to designate individual errors as being acceptable and have that error marker change shape or be able to ignore acceptable errors on subsequent checks or something.

We constantly have to put up with acceptable clearance errors being flagged and that leaves an opportunity for unacceptable ones to get missed. This would help distinguish reviewed and accepted errors from unreviewed, possibly unacceptable errors in a design.

+Tom

randychase

11-08-2001, 09:58 AM

On a similar note. Why not create a special copper condition. A line or shape that would be a Shorting Copper.

Basically, you could select a copper item, Right Mouse Button, Create Short

Then a box will pop up asking you which TWO of the list of nets would you like to assign to this copper short. You pick two nets like AGND and GND.

Then, this copper passes DRC as long as it only shorts to GND or AGND. Any other net is still checked for DRC violations.

I think this would be handy and helpful for merging nets. I don't know about everyone else, but I have to merge nets on many of my pc boards. Any way you do it, you have to fool the software with some real downsides.

Tom Frayda

11-08-2001, 11:39 AM

Randy-

That's a great idea for acceptable clearance errors caused by net shorts (which we also use a lot of), but we also get other acceptable clearance errors on a regular basis.

For instance we flood our spark gaps at 0.008" and they always get flagged as a clearance violation when the check is performed at the pour spacing for the rest of the board. I need to verify that only the spark gaps fail when the clearance >0.008" and that they do not fail when the clearance = 0.008" (no real clearance errors are hidden within that mass of error markers), so this resuilts in running two seperate verifies. I hate that.

And then there are the acceptable errors caused by the components that over hang the board edge, the text clearance, etc.

I like your idea, I just think the ability to examine and okay each error is very desirable as well.

+Tom

randychase

11-08-2001, 11:49 AM

Originally posted by Tom Frayda

I like your idea, I just think the ability to examine and okay each error is very desirable as well.

+Tom

Yup. I was not trying to replace your idea, I just want my in addition to your's. :)

Cliff Harris

11-08-2001, 12:24 PM

I would like to be able to "walk" along a trace using the arrow keys. The way this would work is you select a segment of a trace and then use the arrow keys to select the next segment.

This would be very useful in those cases where you just can't seem to be able to select that one short segment that you REALLY REALLY want to move, delete, etc.

nexus

11-13-2001, 06:28 AM

My first wish is concerning parts. I would love to be able to change a through-hole from plated to non-plated without having to delete the entire padstack. If the change from plated to non-plated would delete the thermals, then one wouldn't have to delete the padstack. This is even more difficult in the 4.0 release because the padstack defaults to the 'all' padstack which is usaully the main pin who need the thermals.

My second wish is the ability to change the colors of the testpoint tags to be able to tell the difference between the top and bottom. At the present time they are the same color as the board outline, regardless of what layer they are on.

One last wish. I might be doing something wrong, but I am able to make the rest work. When using macros, everything works well except F11 and F12. They work with shift key, but not with the Control or combination.

I'm sure I can think of some more, but these are the three that have slowed me down lately. Thanks for listening to my complaints.

ratkiller

11-13-2001, 07:18 AM

Originally posted by Cliff Harris
I would like to be able to "walk" along a trace using the arrow keys. The way this would work is you select a segment of a trace and then use the arrow keys to select the next segment.

This would be very useful in those cases where you just can't seem to be able to select that one short segment that you REALLY REALLY want to move, delete, etc.

I second that.

Cliff Harris

11-13-2001, 07:22 AM

Some wishes concerning errors:

I would like to be able to select an error circle by clicking on it and get the message associated with that error in the Verify message box.

I would like to select an error in the Verify message box and delete it from the list. This would be useful when going through the errors to tell which ones have already been checked and found to be non-issues. This should have some kind of option to ignore the error for all future checks or only that one time (it would show up again on the next verify).

I would like to be able to be able to "unflag" errors associated with a part. For example, I would like to select a connector that hangs off the board and tell PowerPCB that I don't want to see board outline errors on that part. I would do this by unchecking an item on a list of possible error messages for that part. This could also work for those "copper shorts" between nets parts.

Ivor Bowden

11-14-2001, 11:11 AM

Ivor Bowden

11-14-2001, 11:14 AM

ALSO, I want this problem fixed:
When pad type is selected as "Thermal", only square and round pads are available. For Split/Mixed planes, thermal SMT rectangular outer pads will be rectangular if padstack thermal padstyle "Use Global Defaults" is checked. But a user cannot adjust the parameters of those thermal outer rectangular pads because only square and round are the available choices. So the request for enhancement is that for "padstyle = thermal" rectangular and oval pads be allowed as choices, as well as square and round, for outer layers.

nexus

11-14-2001, 11:46 AM

I would like to be able to "walk" along a trace using the arrow keys. The way this would work is you select a segment of a trace and then use the arrow keys to select the next segment.

This isn't a fix but, it is the way I am able to delete the pesky little traces which Pads refuses to select even when I use the TAB button. I switch over to a lower resolution(modeless command OH or OL) and reduce my select radius. This also helps to correct a strange error.

Cliff Harris

11-15-2001, 07:30 AM

I would like to be able to set the origin location by typing XY coordinates into a dialog box.

nexus

11-15-2001, 08:43 AM

In the 'Display Colors Setup', and everywhere else the layers are listed, place the soldermask bottom below the soldermask top. It is done for the paste. Why not the mask.

Done complaining.

jmatt

12-05-2001, 09:01 AM

I'd like to see the individual .rep files generated from CAM be an option, with the "Aperture Report" list be the default.

A separate ap list for each layer is a pain in the ass, and makes absolutely NO sense for 274X Gerbs.

Tom

12-05-2001, 09:52 AM

I would like the option of not producing .REP files every time you created Gerber Files too. This should be on the wish list.

jmatt

12-10-2001, 12:18 PM

Originally posted by Tom Frayda I wish that there was a way to scroll through the initial list of clearance errors found by Verify Design/Clearance and be able to designate individual errors as being acceptable and have that error marker change shape or be able to ignore acceptable errors on subsequent checks or something.

We constantly have to put up with acceptable clearance errors being flagged and that leaves an opportunity for unacceptable ones to get missed. This would help distinguish reviewed and accepted errors from unreviewed, possibly unacceptable errors in a design.

In addition to that, what would be really nice would be the ability to have "DRC blocks" where you could designate a different set of rules for that area.

It would be something similar to a keep-out block, but with either settable rules or a setting in the Design rules setup for "alternate rules" that would only go into effect inside the "DRC Block".

Then, things like trace-to-trace errors popping up on fine-pitch parts or DRC violations for routing pairs to other nets when inside BGAs or when routed into QFPs could be avoided from the start.

Colorado-PC-Dude

12-11-2001, 02:25 PM

>>I would like to be able to set the origin location by typing XY coordinates into a dialog box.<<

Cliff,

You can already do this using the modeless search command. Make sure nothing is highlighted, click "Setup", then "Set origin" and then type "S", (opens the search dialog) "Space" and your XY coordinates. Then just hit the space bar to set the origin at those coordinates. Just remember that it will snap to the grid setting.

Ben

randychase

12-11-2001, 02:33 PM

Yeah, that grid setting thing will kill you if you forget. Either set a small enough grid or turn off "snap to grid" before using coordinates to place/modify anything. This is a change to how it was done by PADS at an earlier point.

I can see pros and cons to this method. You may think it would make sense that if I type a specific coordinate, it would override the snap settings.

Ivor Bowden

12-11-2001, 02:42 PM

"Yeah, that grid setting thing will kill you if you forget"

That confused me at first, I type in some coordinate, hit OK, come back later, and the item is NOT where I told it to be! If grid setting corrupts data entry (rounding to nearest grid point) the LEAST thing should happen is a warning box pop up! Just to accept my data, and mess it up without telling me is NOT forgivable.

EITHER:
Warn the user that the program is rounding (the user's) coordinates to current grid system
OR
Allow the user's coordinates to take precedence over the current grid settings.

After all, I'm not typing in 3.625 because I want the item at 6.75 (e.g. if grid was .25)!!

<rant off>

jmatt

12-21-2001, 08:55 AM

Here's one I almost just got bit by:

In CAM, under "Output File", it would be desirable if you couldn't duplicate names (example: you can't duplicate names under "Document Name").

It should either not let you have a duplicate name, or it should warn you that you have two files with duplicate output names.

If this were to be implemented one thing that should NOT happen is a "Sorry, you are using a duplicate file name" message and then deleting what you just created, it should just not let you close the window.

Tom

12-21-2001, 09:03 AM

John,

I never thought about that because we use predefined tested CAM files, but you are correct. If you accidentally named the CAM Output File the same as another CAM Output File it would overwrite the first file that was produced. Good Catch! And, Innoveda should fix this because I cannot think of a instance where you ever want to name two different CAM Files with the same name. This does leave room for the "Human Error" factor and needs to be fixed so it's impossible to create a duplicate file name.

jmatt

12-21-2001, 09:14 AM

Yeah, we use predefined also, but I just did a mod to a board where a solderpaste stencil for the bottom side had to be added to the CAM, and I initially gave it our code for the top side stencil AW.

Luckily I caught it when I generated new data and realized there was only one stencil in the output files.

phillipr

01-11-2002, 06:50 AM

phillipr

01-11-2002, 06:58 AM

I would also like a picklist menu as an option.

when you go to select something and there are more than 1 selectable item, it could bring up a list of all selectable items
in the pick radius by giving a short disciption. it could also highlight while you put the cursor over the item in the menu list.

A bit of work for innoveda, but it would be useful.

phillipr

01-11-2002, 07:25 AM

I'm on a bit of a roll.

I would like to be able to resize some of the popup windows
like the colour display window. If i have a 12 layer board i have to keep scrolling up and down the list all the time.
i would prefer to pull the box down so i can see all 12 layers or as many as i can fit on my screen vertically.

Mark Larson

01-11-2002, 10:49 AM

I want Inoveda to fix outlines and the way they are implemented, it's a mess.

Cliff Harris

01-14-2002, 08:02 AM

I would like to be able to turn off the layers that are not used and have them not appear in the drop-down layer menu.

Lameris

01-14-2002, 09:19 AM

For ProE export, pick only the outermost polygon whose dimensions exceed 1 square mm.

Ignore line segments and polygons inside the outermost polygon. Also ignore the pin 1 circle (PCBstandards library default for this is 0.125mm Radius circle)

This will allow us to use Layer 27 consistantly, and allow better assembly drawings for Non-ProE export.

Tom

01-14-2002, 09:25 AM

Innoveda must fix the Part Outline issue.

Here are the issues:

Courtyards: We need an official Placement Courtyard layer. This is necessary for accurate pick and place machine data. We just can't guess how close we can place parts "On the Fly". Even the best designers need accurate Placement Courtyards to help them in the part placement phase.

PRO-E Interface: We need a layer dedicated to placing 1:1 scale Closed Polygons for PRO-E output. You cannot really use an Assembly Drawing layer because you want to illustrate Polarity Markers and other items. From what I understand is the the PRO-E interface only wants to see closed polygons and if you have anything else on that layer you do not get the results you expect.

Silkscreen Outline: What is the PowerPCB "Offical Layer" for placing silkscreen outlines? We use Layer_1.

jmatt

01-15-2002, 01:00 PM

Another thing I just came across.

I wanted to adjust a row of vias to line up with each other and also move them about 15 or 20 mils.

Well guess what? If You query them, you can change their X (or Y) one at a time, but if you select several, the X and Y boxes grey out. You can move a via one at a time also, but if you want to move several together, guess what happens again? Yup, you can't do it.....DRC on or off? Doesn't matter

Colorado-PC-Dude

03-05-2002, 03:37 PM

I'd like to be able to select a part in the "Library manager" and view the attributes for the selected part.

Ben

Mark Larson

03-06-2002, 08:31 AM

How about the ability to take a section of routed components and flip them to the other side while saving the routes?

Lameris

03-08-2002, 10:42 AM

I want:

1. A date/time stamp on each component so that I know when the part was changed in the library from the part placed on the PCB.

2. Aliases: Getting a part from the first library that contains said part, just doesn't cut it. I want parts out of the approved library not the development library. I want decals for a part out of a specified libary. And if I'm making a part, I want it in the development library.

3. True support of Alpha-numeric pins in Decals. Mapping a number to a part that has the alpha-numeric pins just doesn't cut it.

4. Integration with a revision control system like DxDataManager. I want to check the boards in when released and out when new work needs to be done.

5. Improved ProE support so that the part outlines do not have to be dedicated to their own layer with just the part outline on that layer.

6. Maintaining my preferences when upgrading, I have yet to have an upgrade remember any settings for library paths, stored files, etc. (Why does the software even browse for it)

7. Checking out an options license as it is used (especially with floating licenses) and not automatically checking out all features when PowerPCB is launched.

8. Not being able to screw up a design by opening it on a system without rules, modifying the design, and then finding the rules are all screwed up when said design is opened up on a workstation with rules.

9. Why can't I print with Critical Place and Route, but I can print with the Viewer?

10. An easy check print printout so the engineers can make their own. Why is file print, screen window or extents, so difficult? (We will probably end up with something as useful as DXF, oh wait, we have CAM outputs for that ;-)

tboyer

03-13-2002, 05:32 PM

There is only two ways that SMT pads for ICT can be placed.

One is by creating a part. The issue with this method is that it makes the board netlist different than the schematic. Also the traces will not shove out of the way while placing the part.

The second method is to create a partial via. This works and the traces can be shoved. The netlist of the board also does not change. The problem with this method is that due to patial vias needing a start and end layer it causes a DRC error for every via placed. I created a partial via with a start layer of Top and a End layer of internal 2 which is a positive plane layer (route). The pad on the internal layer is set to a diameter of zero. The software allows the routing and placement with DRC Prevent = ON.

What I need is the ability to place an SMT via without causing DRC errors.

I was successful in V3.6 using a through via with only a top or bottom pad of greater than zero. Under V4.0 of PowerPCB this no longer works.

Mark Larson

03-14-2002, 10:23 AM

you don't mention what the DRC error is

I have heard of others having problems as well, but when I checked what they were doing the problem had to do with not designating the via as partial, but you are doing that, perhaps there is another problem

I suspect your problem can be fixed as well, I have used surface mount partial vias with no problem in either verify design or generating Gerbers

tboyer

03-14-2002, 10:50 AM

There is no DRC error during placement only after.

Example:

(1663.5,4737 L1) subnet #1 of N01191

Explanation:

C214.1 R207.2 C215.1 U205.8

I have included 2 boards. The 1031 board is in V4.01 and uses the partial vias suggested by Innoveda tech support. The 1061 board is in V3.6 and uses SMT thru vias.

Mark Larson

05-22-2002, 08:58 AM

when I reflood layer 1 and do a clearance check, there is no error with the 120-1033-002RA file, same for the other file, so my conclusion still is that there are no problems with surface mount vias if they are defined correctly.

Colorado-PC-Dude

06-10-2002, 02:24 PM

It would be real handy to be able to change the color of any unconnected pads, either globally or by part.

Ben

Colorado-PC-Dude

06-11-2002, 11:28 AM

Another feature that would be nice woyld be the ability to output copper floods to DXF without the parts. Presently if you de-select "Parts-Top" OR "Parts-Bottom" the "Copper Pour" automatically becomes de-selected. I don't always want or need the parts (and all the associated crap that comes with them) when I want a DXF of the copper pour to work on in AutoCAD.

Ben

Colorado-PC-Dude

06-14-2002, 02:31 PM

How about the ability to join/split 2d line items similar to AutoCAD?

Ben

Colorado-PC-Dude

07-11-2002, 04:39 PM

When you select a net and query it, you can choose to protect routes and/or unrouts. If a via has a route connected to it, it gets protected. If it doesn't, it cannot get protected. I would like to be able to protect vias as well as routs and unrouts. Free vias don't stand a chance against ECOs without protection and running a bunch of stub traces is a royal pain.

Ben

Tom

07-30-2002, 03:12 PM

When you install PADS software, there are many menu default values that need to be fixed (corrected, changed, improved, whatever).
One of these defaults is in Setup/Preferences/Drafting/Flood/Min Hatch Area/0 (Zero).
If any of you out there are working on large designs with Split/Mixed Planes or Copper Pours and you've got a fast computer but reflood still takes 30 - 40 minutes, try setting the Setup/Preferences/Drafting/Flood/Min Hatch Area to 100.
You will immediately notice a 10:1 difference in the reflood speed. 30 minutes becomes 3 minutes. So my question is: Why is 0 (zero) the default? Try to find something in the Help Menu regarding this feature.
We, the users, need to come to an agreement on what the default settings should be for every menu in PADS. We'll take a vote soon and submit the results to Mentor.

jmatt

08-08-2002, 11:52 AM

My boss here at Silicon Hills asked me to put this one up...

It would be nice if you could "tag" unfinished or unverified decals or special routing, layer stacks, etc somehow.

These tags would pop up during DRC and/or CAM to remind you to verify that that action item has been completed.

This would be especially useful in "hand-off" designs where data can get "lost" in the transfer.

It could also be used to denote "intentional" errors (such as jumpers). Or reminders/questions you might have for your engineer.