DUPD
02-20-2003, 01:10 PM
Let's get to the point: In our Design, I placed a trace either on TOP and BOTTOM layers, 350mils width X 4.4inches long, FR-4 PCB, 2 layers, 3 oz. Have to carry 30 amps. We have a TQFP-64 CPU with 8 mils traces...
Due to high reject level from PCB manufacturers, we have to downsize to 2oz. But "power traces" will for sure overheat... We performed some tests and realized that when removing soldermask, we increase thermal transfer to air and of coarse solder helps to increase trace thickness on bottom side. But it is not enough... I would like to put a bunch of VIA to increase heat transfer between TOP & BOTTOM layers but.... Will it works ? Is this a solution or if VIA won't help ? What size of VIA should I use ? How many ???
More hints: We need a LOW COST solution, thus forget about forced convection or multilayer PCB...! Not enough space to increase trace width or bus-bar.
Thanks for helping !
Due to high reject level from PCB manufacturers, we have to downsize to 2oz. But "power traces" will for sure overheat... We performed some tests and realized that when removing soldermask, we increase thermal transfer to air and of coarse solder helps to increase trace thickness on bottom side. But it is not enough... I would like to put a bunch of VIA to increase heat transfer between TOP & BOTTOM layers but.... Will it works ? Is this a solution or if VIA won't help ? What size of VIA should I use ? How many ???
More hints: We need a LOW COST solution, thus forget about forced convection or multilayer PCB...! Not enough space to increase trace width or bus-bar.
Thanks for helping !