Tom
12-05-2002, 04:55 PM
IPC Advanced Study Guide Page Reference: Page 216 & 217, Section 4.6
One of the favorite multilayer board concepts is to build an eight-layer board, with components on both sides. This concept allows for layer pairs in fabrication. From an electrical point of view there are two surface layers, two signal layers, two ground planes and two voltage planes.
One should try to avoid free-standing voltage planes. Try to associate voltage plane with adjacent ground planes in the stack up of a multilayer board.
Spacing between power and ground planes is also important. Having the ground plane and voltage plane adjacent to each other is the best approach to improve capacitive decoupling. The closer spacing increases the value of the capacitance. This starts at 0.25 mm and when it gets to 0.75 mm there is hardly any capacitance. To achieve the best capacitance one should use a spacing of 0.08 mm dielectric separation.
The stack up for some boards is difficult to overcome all the compromises. The spacing between the voltage and ground is one objective, however there are designs where the ground wants to be closest to the component surface layer. Thus it is a good approach to have a ground plane as layer 2 of a four-layer board with components mounted on layer one. Another consideration is to identify the true power pins of the IC. Some IC’s have reference voltage pins, however the decoupling should be on the true power pins of the IC package.
The decoupling capacitor should be close to the true power pins of the package for the best performance condition. It is preferable to have the decoupling capacitor on the same side as the IC in order to minimize inductance. Going through a via is not the best condition since it increases the inductance, and reduces the effectiveness of the decoupling capacitor. Having the capacitor as close to the pin as possible becomes critical for high speed circuits and RF circuits.
The positioning of decoupling capacitors becomes very important. It should be understood that there is a difference between the positioning of the decoupling capacitor based on whether the circuit is a pure digital circuit or whether the circuit is to operate at Radio Frequency (RF) domains. Digital signals relate to a broad range of frequencies occurring during signal transition from one saturated state to another. RF, basically relates to conditions that signals occupy at frequencies over a particular bandwidth.
The fundamental design rules for both digital and RF circuits are the same, however they are applied in different ways to achieve the desired result. In a preferred RF case the decoupling capacitor is series resonant at frequencies of interest where the lowest impedance of the capacitor is most important. Extra via inductance is detrimental.
One of the favorite multilayer board concepts is to build an eight-layer board, with components on both sides. This concept allows for layer pairs in fabrication. From an electrical point of view there are two surface layers, two signal layers, two ground planes and two voltage planes.
One should try to avoid free-standing voltage planes. Try to associate voltage plane with adjacent ground planes in the stack up of a multilayer board.
Spacing between power and ground planes is also important. Having the ground plane and voltage plane adjacent to each other is the best approach to improve capacitive decoupling. The closer spacing increases the value of the capacitance. This starts at 0.25 mm and when it gets to 0.75 mm there is hardly any capacitance. To achieve the best capacitance one should use a spacing of 0.08 mm dielectric separation.
The stack up for some boards is difficult to overcome all the compromises. The spacing between the voltage and ground is one objective, however there are designs where the ground wants to be closest to the component surface layer. Thus it is a good approach to have a ground plane as layer 2 of a four-layer board with components mounted on layer one. Another consideration is to identify the true power pins of the IC. Some IC’s have reference voltage pins, however the decoupling should be on the true power pins of the IC package.
The decoupling capacitor should be close to the true power pins of the package for the best performance condition. It is preferable to have the decoupling capacitor on the same side as the IC in order to minimize inductance. Going through a via is not the best condition since it increases the inductance, and reduces the effectiveness of the decoupling capacitor. Having the capacitor as close to the pin as possible becomes critical for high speed circuits and RF circuits.
The positioning of decoupling capacitors becomes very important. It should be understood that there is a difference between the positioning of the decoupling capacitor based on whether the circuit is a pure digital circuit or whether the circuit is to operate at Radio Frequency (RF) domains. Digital signals relate to a broad range of frequencies occurring during signal transition from one saturated state to another. RF, basically relates to conditions that signals occupy at frequencies over a particular bandwidth.
The fundamental design rules for both digital and RF circuits are the same, however they are applied in different ways to achieve the desired result. In a preferred RF case the decoupling capacitor is series resonant at frequencies of interest where the lowest impedance of the capacitor is most important. Extra via inductance is detrimental.