- Official Enhancement/Wish List for PowerPCB/Blaze V5
- Hierarchical against Default Copper Clearance
- Tented Vias using PwrPCB V5
- Auto insertion file part numbers
- Help with Copper Pour
- Autoplacement with POWERPCB
- DXF to boardoutline ??
- Ipc-d-356
- used PADS or Protel
- Renumber RefDes
- Replacing old library parts
- Pad and Via holes in the printout
- Via: Hole to Pad misalignment/size
- what's different PasteMask between SolderMask ?
- XP and powerpcb
- Assigning Hotkeys
- To many errors
- Powerpcb
- sizing shematic in logic
- edge connector question
- Clearance of isolated cicruits
- copy circuits
- 2d-Line to Copper
- Another Copper Question
- Embedded plane bug?
- blind and buried vias
- Staggered die wire bonds
- Straddle connector decal
- Docs that explain PowerPCB DFF & DFT features ?
- PowerPCB Routing Options
- Jump Vias in PADS
- layer config files (CCF)
- Please vote on the official Wish List!
- Drill Drawing
- Mounting holes question
- Pads Pour Bug #17879
- Change or Bug?
- copper connections and DRC
- Help on Ratsnest
- Physical Design Reuse
- Have someone ever heard PowerBGA this software
- PowerPCB 5.0 Down Conversion Problem...
- Label Generator
- Thermal relief pads
- Power PCB Host ID
- Passing Orcad Value Attribute to PowerPCB
- Orcad to Power Pcb Errors
- Adding VIA without thermal
- TestNode SINGLE SIDED?
- how decision layer in PCBNavigator
- Padstack
- heater on inernal layer of PWB
- Nudging parts with arrow keys?
- Power PCB to Autocad DXF
- Flood over vias VS. thermal spokes
- what functionally for Layer25 ??
- Netcolor Configurations
- PowerPCB Actual Silkscreen Height
- Component placement grids
- DXF to PADS Help
- reduced pad on s/m plane
- Blaze 5.0 matched lengths
- Copper to Circuit Edge Check?
- Print library list including all attributes
- Physical Design Reuse Tutorial
- Knockout text on plane layer?
- Verify Design does not check drafting items???
- fabrication checks....
- Adding part number to pick and place
- Split/Mixed plane pads
- Missing component holes in drill drawing?
- Help on Parts
- PowerPCB TO INVENTOR 6
- Split mixed embedded planes
- This may not be possible
- Customizing pads
- Pick & Place Tool
- Please help on layers structure
- Nested Copper Pour?
- Pick & Place
- Blaze route on BGA
- what's testpoint function in PowrPCB
- inverted text in a copper pour
- How happy are you with Blaze
- Multi-Layer PCB
- Regenerating drill symbols creates sizes NOT in design
- PADS Physical Design Reuse use
- verify design not catching 2 nets shorted.
- routing to a narrow pad
- Help Removing Layers
- DFT errors
- BGA footprint
- ASCII file massaging?
- two pcb decals
- Lead Free Issues
- Not enough clearance between through holes
- Single sided pcb
- PCBStandards PowerPCB start files
- PowerPCB 5.0 and OrCad
- Fanout of .8mm BGA?
- How to push for PADS
- Break Tabs + Netlist Compare
- Bug...
- Autorouting Differential Pairs
- Connecting Ground net
- forward annotate from Orcad to PADS
- Move track to bottom
- Blazerouter Integrity Test
- PowerPCB to Specctra
- New Fanout Script
- Blaze question
- Embedded passives???????
- Printed Inductors
- PTHCalc - Through Hole Calculator
- Design Rules on Different Layers
- expert orcad netlist
- Blaze Optimize Bug
- Does anyone have pcb foot prints for Lemo?
- bga footprint
- How do you route?
- Import 5.0 ECO to 4.0
- What angle?
- PowerLogic 4.0 to download
- Allegro to PowerPCB
- Net names on pads
- *.job file extension??
- Import Routed Traces
- RS274-X Fill Mode
- Reworking PADS4 designs
- DXF Export in PowerPCB 5.01
- Layer 25 Anti-pad Size
- Place part underneath another?
- BGA No Connect Errors
- Ascii file to import ground via 'parts' into a pcb file.
- alpha numeric pins
- Thermal relief on CAM plane
- How do to create PCI bus Connector ?
- suggest me to get the knowledge of pcb concepts
- Load Board Design
- PowerPCB autoplane seperate
- PCB Board Houses
- Separate Fab dwg's/drill chart for uVia, buried via?
- Problem with DXF output in PowerPCB
- Fiducials And Solder Coating
- Creating openings in solder mask
- BGA Decal Creation Question
- Copper Thickness Spec
- IPC 356 Netlist
- Use of Layer 25
- square type PTH pad
- ERC Matrix
- assembly house documents
- board outline
- Creation of rectangle type PTH pad
- positive and negative plane ?
- Immersion Tin
- Current Carrying Capacity of a Plane
- Jig and Tooling Holes?
- Selecting the layer(first pin, component outline)
- What's after 5.0 and when?
- ipc netlist
- CID Certification
- Stitched Via's Disappearing Act
- stencil data to assembly house.
- fabrication note
- Layer thickness
- Dangling net/node
- clearance between 2 power
- Conditional Rules
- scripts for generating pad xy
- Concepts of Soldermask and pastemask
- future versions of Pads
- Nudge.......
- Clearance error in routing
- Missing Silkscreen and Libraries from this site.
- BlazeRouter and FIRE
- What does "shaped-based" and "gridless" mean?.
- "latium technology"and gridless routing
- Roller ball mouse with Pads V5
- use of the cluster
- how to use shielding of POWERPCB hispeed ?
- Generating Multiple Thermal Spokes?
- plane cut in double layer board?
- Clearance between 2 ground planes
- DXF - Drill Drawing
- Looking for DFT Audit option Problems, Setup info, Things to be aware of
- Latium Design Verification
- Need Help
- The function" repeat"of placing via
- PADs-PowerPCB 3-D libraries
- Back annotation with PADS
- Single Pin net
- PowerPCB/Blaze/Latium Architecture wish list.
- CAM Drill Drawing improvements
- matched length for sdram
- Alternate RefDes (or RefDes modifiers)
- Swapping pins in Blaze?
- soldermask
- Error Check
- Is there a way to Combine 2 different databases in Pads?
- plane error
- Latium Rules
- grid checking
- rf miter questiuon
- PADS User Group in Phoenix
- hatch line
- DRC of Gerber Files
- Problem with SMT components routing...
- off- grid pins ---script
- Batch working with libraries
- maximum connections allowed
- Grid check
- output for flying probe tester from 5.1 pads
- Capture to PADS V5.0 netlister (.dll)
- is solder mask effect impedance control
- Which PCB Program is BEST?
- PADS footprint for BGA576, 1.27mm pitch
- Problem with SMT components routing...
- decal outline cum silkscreen
- Error while generating IPC netlist
- Hole size for #4 sheet metal screw
- BB pins
- Pads V5.0 to V4.1
- Problem with CAM file generation
- Scaling value in Plot options?
- Any way to view the nets of particular component alone
- What does the number meant while flooding
- Layer Display setup
- list of assembly house files
- why required Pastemask
- SMT components padsize
- IPC netlist
- pro-e geometry problem
- looking for a 3u backplane .pcb file
- blind vias
- topological routing
- IPC standards?
- Removing Solder Mask
- IPC-7351 is anticipated for release in May 2004.
- layer thickness
- Welcome Screen
- Basic Scripting
- Library Browser
- Hi all. seeking a PDA board *.pcb files for reference
- Switching to "Max" Layers
- PowerPCB Industry Leader?
- Import Protel?
- Color of cursor
- uses of assembly option
- Metal core PCB